a dvanced l inear d evices, i nc. ald4702a/ald4702b ald4702 quad 5v rail-to-rail precision operational amplifier features ? rail-to-rail input and output voltage ranges ? symmetrical push-pull class ab output drivers ? all parameters specified for +5v single supply or 2.5v dual supply systems ? inputs can extend beyond supply rails by 300mv ? outputs settle to 2mv of supply rails ? high load capacitance capability up to 4000pf ? no frequency compensation required -- unity gain stable ? extremely low input bias currents -- 1.0pa typical ? ideal for high source impedance applications ? dual power supply 2.5v to 5.0v operation ? single power supply +5v to +12v operation ? high voltage gain-typically 85v/mv @ 2.5v and 250v/mv @ 5.0v ? drive as low as 2k w load with 5ma drive current ? output short circuit protected ? unity gain bandwidth of 1.5mhz ? slew rate of 1.9v/ m s ? low power dissipation general description the ald4702 is a quad monolithic precision cmos rail-to-rail operational amplifier intended for a broad range of analog applications using 2.5v to 6v dual power supply systems, as well as +4v to +12v battery operated systems. all device characteristics are specified for +5v single supply or 2.5v dual supply systems. total supply current for four operational amplifiers is 6ma maximum at 5v supply voltage. it is manufactured with advanced linear devices' enhanced acmos silicon gate cmos process. the ald4702 is designed to offer a trade-off of performance parameters providing a wide range of desired specifications. it offers the popular industry pin configuration of lm324 and icl7641 types. the ald4702 has been developed specifically with the +5v single supply or 2.5v dual supply user. several important characteristics of the device make many applications easy to implement for these supply voltages. first, the operational amplifier can operate with rail to rail input and output voltages. this feature allows numerous analog serial stages to be implemented without losing operating voltage margin. secondly, the device was designed to accommodate mixed applications where digital and analog circuits may work off the same 5v power supply. thirdly, the output stage can drive up to 400pf capacitive and 5k w resistive loads in non-inverting unity gain connection and double the capacitance in the inverting unity gain mode. these features, coupled with extremely low input currents, high voltage gain, useful bandwidth of 1.5mhz, a slew rate of 2.1v/ m s, low power dissipation, low offset voltage and temperature drift, make the ald4702 a truly versatile, user friendly, operational amplifier. the ald4702 is designed and fabricated with silicon gate cmos technology, and offers 1pa typical input bias current. on-chip offset voltage trimming allows the device to be used without nulling in most applications. the device offers typical offset drift of less than 7 m v/ c which eliminates many trim or temperature compensation circuits. for precision applications, the ald4702 is designed to settle to 0.01% in 8 m s. applications ? voltage amplifier ? voltage follower/buffer ? charge integrator ? photodiode amplifier ? data acquisition systems ? high performance portable instruments ? signal conditioning circuits ? sensor and transducer amplifiers ? low leakage amplifiers ? active filters ? sample/hold amplifier ? picoammeter ? current to voltage convert ? coaxial cable driver ordering information operating temperature range* -55 c to +125 c0 c to +70 c0 c to +70 c 14-pin 14-pin 14-pin cerdip small outline plastic dip package package (soic) package ald4702a db ald4702a sb ald4702a pb ald4702b db ald4702b sb ald4702b pb ald4702 db ald4702 sb ald4702 pb * contact factory for industrial temperature range pin configuration db, pb, sb package out d -in d +in d v- +in c -in c out c out a -in a +in a v + +in b -in b out b 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ? 1998 advanced linear devices, inc. 415 tasman drive, sunnyvale, california 94089 -1706 tel: (408) 747-1155 fax: (408) 747-1286 http://www.aldinc.com
ald4702a/ald4702b advanced linear devices 2 ald4702 absolute maximum ratings supply voltage, v + referenced to v - -0.3v to v + +13.2v supply voltage, v s referenced to v - 6.6v differential input voltage range -0.3v to v + +0.3v power dissipation 600 mw operating temperature range pb, sb package 0 c to +70 c db package -55 c to +125 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c supply v s 2.0 6.0 2.0 6.0 2.0 6.0 v dual supply voltage v + 4.0 12.0 4.0 12.0 4.0 12.0 v single supply input offset v os 1.0 2.0 5.0 mv r s 100k w voltage 2.0 3.5 6.5 mv 0 c t a +70 c input offset i os 1.0 25 1.0 25 1.0 25 pa t a = 25 c current 240 240 240 pa 0 c t a +70 c input bias i b 1.0 30 1.0 30 1.0 30 pa t a = 25 c current 300 300 300 pa 0 c t a +70 c input voltage v ir -0.3 5.3 -0.3 5.3 -0.3 5.3 v v + = +5v range -2.8 +2.8 -2.8 +2.8 -2.8 +2.8 v v s = 2.5v input r in 10 12 10 12 10 12 w resistance input offset tcv os 777 m v/ cr s 100k w voltage drift power supply psrr 65 83 65 83 60 83 db r s 100k w rejection ratio 65 83 65 83 60 83 0 c t a +70 c common mode cmrr 65 83 65 83 60 83 db r s 100k w rejection ratio 65 83 65 83 60 83 0 c t a +70 c large signal a v 15 28 15 28 12 28 v/mv r l = 10k w voltage gain 100 100 100 v/mv r l 3 1m w output v o low 0.002 0.01 0.002 0.01 0.002 0.01 v r l = 1m w single supply voltage v o high 4.99 4.998 4.99 4.998 4.99 4.998 0 c t a +70 c range v o low -2.44 -2.40 -2.44 -2.40 -2.44 -2.40 v r l = 10k w dual supply v o high 2.40 2.44 2.40 2.44 2.40 2.44 0 c t a +70 c output short i sc 888ma circuit current supply i s 4.0 6.0 4.0 6.0 4.0 6.0 ma v in = 0v no load current power p d 20 30 20 30 20 30 mw v s = 2.5v dissipation all four amplifiers input c in 111pf capacitance bandwidth b w 0.7 1.5 0.7 1.5 0.7 1.5 mhz slew rate s r 1.1 1.9 1.1 1.9 1.1 1.9 v/ m sa v = +1 r l = 10k w rise time t r 0.2 0.2 0.2 m sr l = 10k w overshoot 10 10 10 % r l = 10k w c l = 100pf factor operating electrical characteristics t a = 25 c v s = 2.5v unless otherwise specified 4702a 4702b 4702 parameter symbol min typ max min typ max min typ max unit test conditions
ald4702a/ald4702b advanced linear devices 3 ald4702 input offset v os 2.0 4.0 7.0 mv r s 100k w voltage input offset i os 8.0 8.0 8.0 na current input bias i b 10.0 10.0 10.0 na current power supply psrr 60 75 60 75 60 75 db r s 100k w rejection ratio common mode cmrr 60 83 60 83 60 83 db r s 100k w rejection ratio large signal a v 10 25 10 25 7 25 v/mv a v = +1 voltage gain r l 10k w output voltage v o low 0.1 0.2 0.1 0.2 0.1 0.2 v r l 10k w range v o high 4.8 4.9 4.8 4.9 4.8 4.9 v s = +5.0v -55 c t a +125 c unless otherwise specified 4702a da 4702b da 4702 da parameter symbol min typ max min typ max min typ max unit test conditions maximum load c l 400 400 400 pf gain = 1 capacitance 4000 4000 4000 pf gain = 5 input noise e n 26 26 26 nv/ ? hz f = 1khz voltage input current noise i n 0.6 0.6 0.6 fa/ ? hz f = 10hz settling t s 8.0 8.0 8.0 m s 0.01% time 3.0 3.0 3.0 m s 0.1% a v = -1 r l = 5k w c l = 50pf operating electrical characteristics (cont'd) t a = 25 c v s = 2.5v unless otherwise specified 4702a 4702b 4702 parameter symbol min typ max min typ max min typ max uni test conditions power supply psrr 83 83 83 db r s 100k w rejection ratio common mode cmrr 83 83 83 db r s 100k w rejection ratio large signal a v 250 250 250 v/mv r l = 10k w voltage gain output voltage v o low -4.90 -4.8 -4.90 -4.8 -4.90 -4.8 v r l = 10k w range v o high 4.8 4.93 4.8 4.93 4.8 4.93 bandwidth b w 1.7 1.7 1.7 mhz slew rate s r 2.8 2.8 2.8 v/ m sa v = +1 c l = 50pf t a = 25 c v s = 5.0v unless otherwise specified 4702a 4702b 4702 parameter symbol min typ max min typ max min typ max unit test conditions
ald4702a/ald4702b advanced linear devices 4 ald4702 design & operating notes: 1. the ald4702 cmos operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. the ald4702 is internally compensated for unity gain stability using a novel scheme. this design produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. a unity gain buffer using the ald4702 will typically drive 400pf of external load capacitance without stability problems. in the inverting unity gain configuration, it can drive up to 800pf of load capacitance. compared to other cmos operational amplifiers, the ald4702 is much more resistant to parasitic oscillations. 2. the ald4702 has complementary p-channel and n-channel input differential stages connected in parallel to accomplish rail-to-rail input common mode voltage range. with the common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. to maintain compatibility with other opera- tional amplifiers, this switching point has been selected to be about 1.5v above the negative supply voltage. as offset voltage trimming on the ald4702 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain greater than 2.5 (5v operation), where the common mode voltage does not make excursions below this switching point. 3. the input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pa at room temperature. this low input bias current assures that the analog signal from the source will not be distorted by input bias currents. for applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. the output stage consists of class ab complementary output drivers, capable of driving a low resistance load. the output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor when connected. in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes the ald4702 an effective analog signal buffer for medium to high source imped- ance sensors, transducers, and other circuit networks. 5. the ald4702 operational amplifier has been designed with static discharge protection. internally, the design has been carefully implemented to minimize latch up. however, care must be exercised when handling the device to avoid strong static fields. in using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3v of the power supply voltage levels. alternatively, a 100k w or higher value resistor at the input terminals will limit input currents to acceptable levels while causing very small or negligible accuracy effects. typical performance characteristics input bias current as a function of ambient temperature ambient temperature ( c) 1000 100 10 0.1 1.0 input bias current (pa) 100 -25 0 75 125 50 25 -50 v s = 2.5v 10000 open loop voltage gain as a function of supply voltage and temperature supply voltage (v) 1000 100 10 1 open loop voltage gain (v/mv) 0 2 4 6 r l = 10k r l = 5k } -55 c } +25 c } +125 c 8 supply current as a function of supply voltage supply voltage (v) supply current (ma) 12 10 8 6 2 4 0 6 5 4 3 1 2 inputs grounded outputs unloaded t a = -55 c -25 c +80 c +125 c +25 c common mode input voltage range as a function of supply voltage supply voltage (v) common mode input voltage range (v ) 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 t a = 25 c
ald4702a/ald4702b advanced linear devices 5 ald4702 typical performance characteristics large - signal transient response 5v/div 1v/div 2 s/div v s = 2.5v t a = 25 c r l = 10k c l = 50pf input offset voltage as a function of ambient temperature representative units ambient temperature ( c) input offset voltage (mv) -50 -25 0 +25 +50 +75 +100 +125 +4 +5 +3 +1 +2 0 -2 -1 -4 -3 -5 v s = 2.5v input offset voltage as a function of common mode input voltage common mode input voltage (v) -2 -1 0 +1 +2 +3 15 10 5 0 -5 -10 -15 input offset voltage (mv) v s = 2.5v t a = 25 c open loop voltage gain as a function of load resistance load resistance ( ) 1k 10k 1000k 100k 1000 100 10 1 open loop voltage gain (v/mv) v s = 2.5v t a = 25 c small - signal transient response 100 mv/div 20 mv/div v s = 2.5v t a = 25 c r l = 10k c l = 50pf 2 s/div open loop voltage gain as a function of frequency frequency (hz) 1 10 100 1k 10k 1m 10m 100k 120 100 80 60 40 20 0 -20 open loop voltage gain (db) v s = 2.5v t a = 25 c 90 0 45 180 135 phase shift in degrees voltage noise density as a function of frequency frequency (hz) 10 100 1k 10k 100k 150 125 100 75 50 25 0 1000k voltage noise density (nv/ hz) v s = 2.5v t a = 25 c r l = 10k output voltage swing as a function of supply voltage supply voltage (v) output voltage swing (v) 3 0 1 2 3 4 5 6 7 r l = 2k 6 5 4 2 7 25 c t a 125 c r l = 10k
ald4702a/ald4702b advanced linear devices 6 ald4702 typical applications rail-to-rail waveform rail-to-rail voltage follower/buffer performance waveforms. upper trace is the output of a wien bridge oscillator. lower trace is the output of rail-to-rail voltage follower. 0v +5v output 0v +5v input - + output v in 5v c l r l =10k 0.1 f ~ z in = 10 12 400pf * see rail to rail waveform 0 v in 5v wien bridge oscillator (rail-to -rail) sine wave generator rail-to-rail voltage comparator - + output 50k 0.1 f +5v 10m v in +5v low offset summing amplifier photo detector current to voltage converter output input 1 input 2 - + +2.5v .01 f .01 f - 2.5v gain = 5 c l = 4000pf * circuit drives large load capacitance 4000pf 10k 10k 50k + - +2.5v -2.5v r f = 5m r l = 10k v out = i x r f i photodiode 10k - + output 10k 10k +2.5v -2.5v .01 f 1 2 r c f = ~ 1.6khz c = .01 f r = 10k * see rail to rail waveform ~
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